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? 1999 burr-brown corporation pds-1530a printed in u.s.a. june, 1999 features l designed for low cost l single, dual versions l low offset voltage drift: 450 m v max, 5 m v/ c max l low gain error: 0.05% max l wide bandwidth: 1.5mhz l high slew rate: 5v/ m s l fast settling time: 5.5 m s to 0.01% l low quiescent current: 950 m a l wide supply range: 2.25v to 18v l so-8 and so-14 packages applications l differential input amplifier building block l diff in / diff out amplifier l unity-gain inverting amplifier l gain = +1/2 or g = +2 amplifier l summing amplifier l synchronous demodulator l current/differential line receiver l voltage-controlled current source l battery powered systems l low cost automotive description the ina133 and ina2133 are high slew rate, unity- gain difference amplifiers consisting of a precision op amp with a precision resistor network. the on-chip resistors are laser trimmed for accurate gain and high common-mode rejection. excellent tcr tracking of the resistors maintains gain accuracy and common-mode rejection over temperature. they operate over a wide supply range, 2.25v to 18v (+4.5v to +36v single supply), and input common-mode voltage range extends beyond the positive and negative supply rails. ina133 ina2133 high-speed, precision difference amplifiers international airport industrial park ? mailing address: po box 11400, tucson, az 85734 ? street address: 6730 s. tucson bl vd., tucson, az 85706 ? tel: (520) 746-1111 twx: 910-952-1111 ? internet: http://www.burr-brown.com/ ? cable: bbrcorp ? telex: 066-6491 ? fax: (520) 889-1510 ? i mmediate product info: (800) 548-6132 the differential amplifier is the foundation of many commonly used circuits. the low cost ina133 and ina2133 provide this precision circuit function without using an expensive precision network. the single version, ina133, package is the so-8 surface mount. the dual version, ina2133, package is the so-14 surface mount. both are specified for operation over the extended industrial temperature range, C40 c to +85 c. operation is from C55 c to +125 c. 25k w 25k w sense ina133 output v+ ref ?n +in 5 6 1 2 7 v 4 3 25k w 25k w sense a ina2133 out a v+ ref a ?n a +in a 12 13 14 2 11 v 4 3 25k w 25k w 25k w 25k w 25k w 25k w 25k w 25k w b a sense b out b ref b ?n b +in b 10 9 8 6 5 in a 13 3 in a2133 for most current data sheet and other product information, visit www.burr-brown.com sbos115
2 ina133, ina2133 INA133U INA133Ua ina2133u ina2133ua specifications: v s = 15v at t a = +25 c, v s = 15v, r l = 10k w connected to ground, and reference pin connected to ground, unless otherwise noted. the information provided herein is believed to be reliable; however, burr-brown assumes no responsibility for inaccuracies or o missions. burr-brown assumes no responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. pr ices and specifications are subject to change without notice. no patent rights or licenses to any of the circuits described herein are implied or granted to any third party. burr-brown does not authorize or warrant any burr-brown product for use in life support devices and/or systems. parameter conditions min typ max min typ max units offset voltage (1) rto initial (1) v cm = 0v 150 450 [ 900 m v vs temperature t a = C40 c to +85 c 2 5 see typical curve m v/ c vs power supply v s = 2.25v to 18v 10 30 900 50 m v/v vs time 0.3 [ m v/ ? mo channel separation (dual) dc 120 [ db input impedance (2) differential 50 [ k w common-mode v cm = 0v 25 [ k w input voltage range common-mode voltage range positive v o = 0v 2(v+) C3 2(v+) C2 [[ v negative v o = 0v 2(vC) +3 2(vC) +2 [[ v common-mode rejection ratio v cm = C27v to +27v, r s = 0 w 80 90 74 [ db output voltage noise (3) rto f = 0.1hz to 10hz 2 [ m vp-p f = 10hz 80 [ nv/ ? hz f = 100hz 60 [ nv/ ? hz f = 1khz 57 [ nv/ ? hz gain initial 1 [ v/v error v o = C14v to +13.5v 0.02 0.05 [ 0.1 % vs temperature t a = C40 c to +85 c 1 10 [[ ppm/ c nonlinearity v o = C14v to +13.5v 0.0001 0.001 [ 0.002 % of fs output voltage output gain error < 0.1% positive r l = 10k w to ground (v+) C1.5 (v+)C1.3 [[ v negative r l = 10k w to ground (vC) +1 (vC)+0.8 [[ v positive r l = 100k w to ground (v+)C0.8 [ v negative r l = 100k w to ground (vC)+0.3 [ v current limit, continuous-to-common C25/+32 [ ma capacitive load (stable operation) 1000 [ pf frequency response small-signal bandwidth C3db 1.5 [ mhz slew rate 5 [ v/ m s settling time: 0.1% 10v step, c l = 100pf 4 [ m s 0.01% 10v step, c l = 100pf 5.5 [ m s overload recovery time 50% overdrive 4 [ m s power supply rated voltage 15 [ v operating voltage range dual supplies 2.25 18 [[ v single supply +4.5 +36 [[ v quiescent current (per amplifier) i o = 0 0.95 1.2 [[ ma temperature range specification C40 +85 [[ c operation C55 +125 [[ c storage C55 +125 [[ c thermal resistance q ja so-8 surface mount 150 [ c/w so-14 surface mount 100 [ c/w [ specifications the same as INA133U, ina2133u. notes: (1) includes the effects of amplifiers input bias and offset currents. (2) 25k w resistors are ratio matched but have 20% absolute value. (3) includes effects of amplifiers input current noise and thermal noise contribution of resistor network.
3 ina133, ina2133 INA133U INA133Ua ina2133u ina2133ua specifications: v s = 5v at t a = +25 c, v s = 5v, r l = 10k w connected to ground, and reference pin connected to ground, unless otherwise noted. supply voltage, v+ to vC .................................................................... 36v input voltage range ........................................................................ 2 ? v s output short-circuit (to ground) (2) .......................................... continuous operating temperature .................................................. C55 c to +125 c storage temperature ..................................................... C55 c to +125 c junction temperature .................................................................... +150 c lead temperature (soldering, 10s) ............................................... +300 c notes: (1) stresses above these ratings may cause permanent damage. exposure to absolute maximum conditions for extended periods may degrade device reliability. (2) one channel per package. absolute maximum ratings (1) electrostatic discharge sensitivity this integrated circuit can be damaged by esd. burr-brown recommends that all integrated circuits be handled with ap- propriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. package specified drawing temperature package ordering transport product package number (1) range marking number (2) media single INA133U so-8 surface mount 182 C40 c to +85 c INA133U INA133U rails """"" INA133U/2k5 tape and reel INA133Ua so-8 surface mount 182 C40 c to +85 c INA133Ua INA133Ua rails """"" INA133Ua/2k5 tape and reel dual ina2133u so-14 surface mount 235 C40 c to +85 c ina2133u ina2133u rails """"" ina2133u/2k5 tape and reel ina2133ua so-14 surface mount 235 C40 c to +85 c ina2133ua ina2133ua rails """"" ina2133ua/2k5 tape and reel notes: (1) for detailed drawing and dimension table, please see end of data sheet, or appendix c of burr-brown ic data book. (2 ) models with a slash (/) are available only in tape and reel in the quantities indicated (e.g., /2k5 indicates 2500 devices per reel). ordering 2500 pieces of INA133Ua/2k5 will get a single 2500-piece tape and reel. for detailed tape and reel mechanical information, refer to appendix b of burr-brown ic data book. package/ordering information parameter conditions min typ max min typ max units offset voltage (1) rto initial (1) v cm = 0v 300 750 [ 1500 m v vs temperature 2 [ m v/ c input voltage range common-mode voltage range positive v o = 0v 2(v+) C 3 2(v+) C2 [[ v negative v o = 0v 2(vC) + 3 2(vC) + 2 [[ v common-mode rejection ratio v cm = C7v to +7v, r s = 0 w 80 90 74 [ db gain initial 1 [ v/v gain error v o = C4v to 3.5v 0.02 0.05 [ 0.1 % nonlinearity v o = C4v to 3.5v 0.0001 0.001 [ 0.002 % of fs output voltage output gain error < 0.1% positive r l = 10k w to ground (v+) C1.5 (v+) C1.3 [[ v negative r l = 10k w to ground (vC) +1 (vC) +0.8 [[ v positive r l = 100k w to ground (v+) C0.8 [ v negative r l = 100k w to ground (vC) +0.3 [ v power supply rated voltage 15 [ v operating voltage range dual supplies 2.25 18 [[ v single supply +4.5 +36 [[ v quiescent current (per amplifier) i o = 0 0.92 1.2 [[ ma [ specifications the same as INA133U, ina2133u. notes: (1) includes the effects of amplifiers input bias and offset currents.
4 ina133, ina2133 pin configurations top view so-8 top view so-14 ref ?n +in v nc v+ output sense nc = no connection ina133 1 2 3 4 8 7 6 5 nc ?n a +in a v +in b ?n b nc ref a out a sense a v+ sense b out b ref b nc = no connection 1 2 3 4 5 6 7 14 13 12 11 10 9 8 a b ina2133
5 ina133, ina2133 typical performance curves at t a = +25 c, v s = 15v, r l = 10k w connected to ground, and reference pin connected to ground, unless otherwise noted. gain vs frequency frequency (hz) closed-loop gain (db) 10k 1m 100k 10m 10 0 ?0 ?0 ?0 ?0 ?0 v s = 15v or 5v +125 c +25 c ?5 c common-mode rejection vs frequency frequency (hz) common-mode rejection (db) 100 100k 1k 10k 1m 100 90 80 70 60 50 40 v s = 15v or 5v power supply rejection vs frequency frequency (hz) power supply rejection (db) 1 100 1k 10k 10 100k 120 100 80 60 40 20 ?srr +psrr channel separation vs frequency channel separation (db) frequency (hz) 130 120 110 100 90 100 1k 10k 100k ina2133 input common-mode voltage vs output voltage output voltage (v) common-mode voltage (v) ?5 0 5 10 ? ?0 15 40 30 20 10 0 ?0 ?0 ?0 ?0 v s = 5v v s = 15v total harmonic distortion+noise vs frequency frequency (hz) thd+n (%) 20 1k 10k 100 20k 0.1 0.01 0.001 500khz filter
6 ina133, ina2133 typical performance curves (cont) at t a = +25 c, v s = 15v, r l = 10k w connected to ground, and reference pin connected to ground, unless otherwise noted. voltage noise density vs frequency frequency (hz) voltage noise (nv/ ? hz) 1 100 10 10k 1k 1000 100 10 quiescent current vs temperature temperature ( c) quiescent current ( a) ?5 ?0 ?5 25 50 75 100 0 125 1400 1300 1200 1100 1000 900 800 700 per amplifier slew rate vs temperature temperature ( c) slew rate (v/ s) ?5 ?0 ?5 25 50 75 100 0 125 7 6 5 4 3 ?r +sr v s = 15v v s = 5v short-circuit current vs temperature temperature ( c) short-circuit |ma| ?5 ?0 ?5 25 50 75 100 0 125 40 35 30 25 20 15 +i sc +i sc ? sc ? sc v s = 15v v s = 5v output voltage swing vs output current output current (ma) output voltage (v) 0 5 10 20 25 30 15 35 ?0 c 85 c 85 c 25 c ?0 c (v+) (v+) ? (v+) ?0 0 (v? +10 (v? +5 v 25 c 0.1hz to 10hz peak-to-peak voltage noise 500 m s/div 1 m v/div
7 ina133, ina2133 typical performance curves (cont) at t a = +25 c, v s = 15v, r l = 10k w connected to ground, and reference pin connected to ground, unless otherwise noted. offset voltage production distribution v s = 15v percent of units (%) offset voltage ( v) 35 30 25 20 15 10 5 0 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 0 100 200 300 400 500 600 700 800 900 typical production distribution of packaged units. singles and duals included. offset voltage production distribution v s = 5v percent of units (%) offset voltage ( v) 30 25 20 15 10 5 0 ?400 ?200 ?000 ?00 ?00 ?00 ?00 0 200 400 600 800 1000 1200 1400 typical production distribution of packaged units. singles and duals included. offset voltage drift production distribution v s = 15v percent of units (%) offset voltage drift ( v/ c) 50 45 40 35 30 25 20 15 10 5 0 012345678910 typical production distribution of packaged units. singles and duals included. offset voltage drift production distribution v s = 5v percent of units (%) offset voltage drift ( v/ c) 60 50 40 30 20 10 0 012345678910 typical production distribution of packaged units. singles and duals included. small-signal overshoot vs load capacitance overshoot (%) load capacitance (pf) 60 50 40 30 20 10 0 100 1k 10k 100k v s = 5v v s = 15v +overshoot ?vershoot ?vershoot +overshoot settling time vs load capacitance capacitive load (pf) settling time ( s) 100 1k 10k 14 12 10 8 6 4 2 0 v s = 15v v s = 5v 10v step 0.1% 0.01%
8 ina133, ina2133 typical performance curves (cont) at t a = +25 c, v s = 15v, r l = 10k w connected to ground, and reference pin connected to ground, unless otherwise noted. maximum output voltage vs frequency frequency (hz) peak-to-peak output voltage (v) 10k 100k 1m 32 28 24 20 16 12 8 4 0 v s = 15v v s = 5v small-signal step response 2.5 m s/div 100mv/div c l = 100pf c l = 1000pf large-signal step response 2.5 m s/div 2v/div c l = 1000pf
9 ina133, ina2133 applications information the ina133 and ina2133 are high-speed difference ampli- fiers suitable for a wide range of general purpose applica- tions. figure 1 shows the basic connections required for operation of the ina133. decoupling capacitors are strongly recommended in applications with noisy or high impedance power supplies. the capacitors should be placed close to the device pins as shown in figure 1. all circuitry is completely independent in the dual version assuring lowest crosstalk and normal behavior when one amplifier is overdriven or short-circuited. as shown in figure 1, the differential input signal is con- nected to pins 2 and 3. the source impedances connected to the inputs must be nearly equal to assure good common- mode rejection. a 5 w mismatch in source impedance will degrade the common-mode rejection of a typical device to approximately 80db (a 10 w mismatch degrades cmr to 74db). if the source has a known impedance mismatch, an additional resistor in series with the opposite input can be used to preserve good common-mode rejection. the ina133s internal resistors are accurately ratio trimmed to match. that is, r 1 is trimmed to match r 2 and r 3 is trimmed to match r 4 . however, the absolute values may not be equal (r 1 + r 2 may be slightly different than r 3 + r 4 ). thus, large series resistors on the input (greater than 250 w ), even if well matched, will degrade common-mode rejection. circuit board layout constraints might suggest possible varia- tions in connections of the internal resistors. for instance, it appears that pins 1 and 3 could be interchanged. however, because of the ratio trimming technique used (see paragraph above) cmrr will be degraded. if pins 1 and 3 are inter- changed, pins 2 and 5 must also be interchanged to maintain proper ratio matching. operating voltage the ina133 and ina2133 operate from single (+4.5v to +36v) or dual ( 2.25v to 18v) supplies with excellent performance. specifications are production tested with 5v and 15v supplies. most behavior remains unchanged throughout the full operating voltage range. parameters which vary significantly with operating voltage are shown in the typical performance curves. input voltage the ina133 and ina2133 can accurately measure differen- tial signals that are above and below the supply rails. linear common-mode range extends from 2 ? (v+)C3v to 2 ? (vC) +3v (nearly twice the supplies). see the typical performance curve, input common-mode voltage vs output voltage. offset voltage trim the ina133 and ina2133 are laser trimmed for low offset voltage and drift. most applications require no external offset adjustment. figure 2 shows an optional circuit for trimming the output offset voltage. the output is referred to the output reference terminal (pin 1), which is normally grounded. a voltage applied to the ref terminal will be summed with the output signal. this can be used to null offset voltage as shown in figure 2. the source impedance of a signal applied to the ref terminal should be less than 10 w to maintain good common-mode rejection. v 3 5 6 1 3 ina133 v out = v 3 v 2 gain error = 0.01% cmr = 90db nonlinearity = 0.0001% 2 r 3 25k w r 4 25k w r 1 25k w r 2 25k w v 2 ?n +in 1 f v 4 1 f v+ 7 figure 1. precision difference amplifier (basic power supply and signal connections). v 3 5 6 3 v o ina133 v o = v 3 v 2 offset adjustment range = 1mv 2 r 3 r 1 r 2 r 4 v 2 10 w 150k w 10 w 100k w +15v ?5v 1 figure 2. offset adjustment.
10 ina133, ina2133 typical applications 5 6 1 3 ina133 2 v 1 v o a 2 a 1 r 2 r 2 r 1 ?n v 2 +in v o = (1 + 2r 2 /r 1 ) (v 2 ? 1 ) figure 3. precision instrumentation amplifier. similar complete a 1 , a 2 feature burr-brown ia opa2227 low noise ina103 opa129 ultra low bias current (fa) ina116 opa2277 low offset drift, low noise ina114, ina128 opa2130 low power, fet-input (pa) ina121 opa2234 single supply, precision, low power ina122, ina118 opa2237 single supply, low power, msop-8 ina122, ina126 the ina133 can be combined with op amps to form a complete instrumenta- tion amplifier with specialized performance characteristics. burr-brown offers many complete high performance ias. products with related performances are shown at the right in the table below. 100 w (1) 1% v 5 6 3 ina133 2 100 w (1) 1% 1 v 0 0 to 2v i in 0 to 20ma note: (1) input series resistors should be less than 250 w (1% max mismatch) to maintain excellent cmr. with 100 w resistors, gain error is increased to 0.5%. figure 4. current receiver with compliance to rails. 5 6 2 v o = (v+)/2 ina133 v+ 1 7 4 v+ common common 3 5 6 v o = ? 2 ina133 gain error = 0.05% maximum nonlinearity = 0.001% maximum gain drift = 1ppm/ c 2 v 2 13 figure 5. pseudoground generator. figure 6. precision unity-gain inverting amplifier.
11 ina133, ina2133 v 1 5 6 1 3 v o = 2 v 1 ina133 gain error = 0.025% maximum gain drift = 2ppm/ c 2 v 3 5 6 3 2 ina133 1 v o = v 3 2 0.05% max (v 1 + v 3 ) 2 v o = 0.05% max v 1 5 6 1 3 2 ina133 v 3 v o = v 1 + v 3 0.05% max v 1 5 6 1 3 ina133 2 v 3 5 6 1 3 ref 2 output ina133 voltage source (1) device vfc320 vfc100 dac80 dac703 xtr110 output 0-10khz 0-f clock /2 0-fs (12 bits) 0-fs (16 bits) 4-20ma ref must be driven by low impedance. note: (1) unipolar input device. opa277 v 1 6 1 3 v o ina133 v 3 25 r 1 r 2 v o = 1 + r 2 r 1 v 1 + v 3 2 ( )( ) for g = 10, see ina143. figure 7. precision gain = 2 amplifier. figure 8. precision gain = 1/2 amplifier. figure 9. precision average value amplifier. figure 10. precision summing amplifier. figure 11. precision bipolar offsetting. figure 12. precision summing amplifier with gain.
12 ina133, ina2133 shield 5 6 1 2 ina133 a 1 a 2 11 12 a 3 output g = 1 + 50k w r g feedback 3 noise (60hz hum) noise (60hz hum) transducer or analog signal 13 7 v+ v 8 ref 10 25k w 25k w 25k w 25k w ina115 1 25k w 25k w 4 2 3 14 15 5 r g 100k w v 1 12 13 a 3 14 1/2 ina2133 2 v 2 v 3 10 9 5 8 v o = v 3 + v 4 ?v 1 ?v 2 1/2 ina2133 6 v 4 b figure 13. instrumentation amplifier guard drive generator. figure 14. precision summing instrumentation amplifier.
13 ina133, ina2133 figure 15. precision voltage-to-current converter with differential inputs. 5 6 3 ina133 2 1 v 1 v 2 load i o = (v 1 ?v 2 ) (1/25k + 1/r) i o r r 5 6 3 ina133 2 1 v 3 v 2 load i o = (v 3 ?v 2 )/r i o r opa131 figure 16. differential input voltage-to-current con- verter for low i out . 5 6 3 ina133 2 1 v 3 v 2 load i o r r gate can be +v s ?v i o = (v 3 ?v 2 ) (1/25k + 1/r) r < 200 w 12 13 3 1/2 ina2133 2 v 01 14 10 9 5 1/2 ina2133 a b 6 v 01 ?v 02 = 2 (v 2 ?v 1 ) v 02 8 v 2 v 1 5 6 3 ina133 2 1 v 3 v 2 load i o r gate can be +v cc ?v i o = (v 3 ?v 2 ) r (r 3 200 w ) figure 17. isolating current source. figure 18. differential output difference amplifier. figure 19. isolating current source with buffering am- plifier for greater accuracy.
14 ina133, ina2133 figure 20. differential input data acquisition. 5 6 1 ina133 ads7806 2 3 4 7 +5v v s 12 bits out 0v-4v input transducer or analog signal ?v eliminates errors due to different grounds. 5 6 3 1 ina133 2 1 v o dg188 v 1 logic in logic in 0 1 v o ? 1 +v 1 v 1 input 5 6 3 1 v 0 = |v 1 | ina133 2 r 4 r 3 r 1 r 2 opa130 10pf d 1 d 2 r 5 2k w figure 21. digitally controlled gain of 1 amplifier. figure 22. precision absolute value buffer.
15 ina133, ina2133 5 6 1 3 ina133 2 4 2 +15v 6 ?0v out +10v out ref102 5 7 6 3 v 3 ina133 2 4 v 2 1 4 2 +15v opa227 ref102 6 10v i o = 4 to 20ma 0v to 10v in 12.5k w 1k w 50k w r load v+ set r 1 = r 2 r 2 50.1 w r 1 50.1 w 2n3904 25k w 25k w 25k w 25k w for 4-20ma applications, the ref102 sets the 4ma low-scale output for 0v input. i o = v 3 ?v 2 + 1 25k w 1 r 2 figure 25. precision voltage-to-current conversion. figure 23. 10v precision voltage reference. figure 24. high output current precision difference amplifier. 5 6 1 ina133 buf634 2 3 v o r l ?n +in buf634 inside feedback loop contributes no error.
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) INA133U active soic d 8 100 pb-free (rohs) cu nipdau level-3-260c-168 hr INA133U/2k5 active soic d 8 2500 pb-free (rohs) cu nipdau level-3-260c-168 hr INA133U/2k5e4 active soic d 8 2500 pb-free (rohs) cu nipdau level-3-260c-168 hr INA133Ua active soic d 8 100 pb-free (rohs) cu nipdau level-3-260c-168 hr INA133Ua/2k5 active soic d 8 2500 pb-free (rohs) cu nipdau level-3-260c-168 hr INA133Ua/2k5e4 active soic d 8 2500 pb-free (rohs) cu nipdau level-3-260c-168 hr INA133Uae4 active soic d 8 100 pb-free (rohs) cu nipdau level-3-260c-168 hr INA133Ue4 active soic d 8 100 pb-free (rohs) cu nipdau level-3-260c-168 hr ina2133u active soic d 14 58 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr ina2133u/2k5e4 active soic d 14 2500 pb-free (rohs) cu nipdau level-3-260c-168 hr ina2133ua active soic d 14 58 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr ina2133ua/2k5e4 active soic d 14 2500 pb-free (rohs) cu nipdau level-3-260c-168 hr ina2133uae4 active soic d 14 58 pb-free (rohs) cu nipdau level-3-260c-168 hr ina2133ue4 active soic d 14 58 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr ina2133ug4 active soic d 14 58 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. package option addendum www.ti.com 12-jan-2007 addendum-page 1
important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 12-jan-2007 addendum-page 2
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. cu stomers should obtain the latest relevant information before placing orders and should verify that such info rmation is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and othe r quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by governm ent requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti component s. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implie d, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are us ed. information published by ti regarding third-party products or services does not consti tute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the pat ents or other intellectual property of ti. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, lim itations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. resale of ti products or services with statements diffe rent from or beyond the parameters stated by ti for that product or service voids all express and any imp lied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.c om audio www.ti.com/audio data converters dataconverter.ti.co m automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security low power wireless www.ti.com/lpw telephony www.ti.com/telephony video & imaging www.ti.com/video wireless www.ti.com/wireless mailing address: texas instruments post office box 6553 03 dallas, texas 75265 copyright ? 2007, texas instruments incorporated

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